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Hyperlynx DDR is an easy-to-use, wizard-based DDR simulator that provides powerful analysis for PCBs with DDR memory, greatly reducing validation and debug cycles.
Hyperlynx DDR Simulates with any number of DRAM devices, from single-memory slots to multiple memory-including low-power variants. It also characterizes Signal Integrity (SI) and system-level timing with set/wait and downgrade calculations for JEDEC or custom standards.
Hyperlynx DDR is part of HyperLynx, a comprehensive family of analysis and simulation tools for high-speed electronic design created by Siemens.
EASY CONFIGURATION WITH THE DDRX WIZARD The simple wizard-based interface simplifies the configuration of DDRx simulations by allowing information from a choice of IBIS models for controllers and memory devices to drive power values for read/write cycles, On-Die-Termination (ODT) settings , and byte-lane / strobe / mask assignment. Wizard configurations can be saved and recalled for future use.
HTML-BASED REPORTS The DDRx wizard generates a clear and intuitive report at the end of the simulation process, including pass/fail data. Results can be filtered, allowing you to explore both timing and SI problems in data read/write cycles, on the address/command bus or via differential networks. It greatly reduces the setup time required for successful simulations, providing detailed results that can help guide decisions in the design process.
SI DETAILED AND INTERACTIVE ANALYSIS Batch mode simulation data created by the DDRx wizard can be saved to disk so that users can examine multiple networks simultaneously offline for detailed SI problems , using the HyperLynx oscilloscope. Users can interactively position sliders and take note of overshoots, undershoots or signal times.
NO SIEMENS EDA TOOL REQUIRED Hyperlynx Ddrx supports Altium Designer, Orcad, Allegro, and CADSTAR, as well as Xpedition and PADS Professional. Regardless of the tool used for PCB design, you will get successful simulations with detailed results that can help guide decisions in the design process.
